A high-performance doping-less tunnel FET with pocketed architecture: proposal and analysis

In this paper, we propose a doping-less dual-material double-gate tunnel field-effect transistor with P+ pocket (PP-DMG TFET). This gate-engineered technique is typically used in MOSFET to improve device performance. The embedded at the source side enhance performance of pocket-engineered PP-DMG TFET device. paper compares four DG-TFET-based devices, i.e. single-material gate (SMG), (PP-SMG), (DMG), and (PP-DMG), by using 2D simulations. Electrostatic doping based on charge plasma concept forms requisite n–i–p+ structure for tunneling formed thin intrinsic silicon layer. proposed (PP-DMG) has high ON-current capability, ON/OFF ratio lower point subthreshold 15.3 mV/dec, an average 18.6 mV/dec. analog parameters transconductance (gm) cutoff frequency (fT) show impressive improvement. efficiency product (TFP) are also discussed. Finally, linearity distortion analysis including VIP2, VIP3, IIP3, IMD3 carried out.